Plasma display panel devices (hereinafter referred to as PDP devices), which have been developed into products, are flat surface display devices that use radiations from gas discharges. The PDP devices includes a DC (direct current) type and an AC (alternate current) type. Among such PDP devices, surface discharge AC type PDP devices have high technical potential and are long in life. Here, the structure of PDPs (hereinafter referred to as PDPs) that are panel units of the PDP devices will be described with reference to FIG. 26A. FIG. 26A is a development perspective view (partially sectional view) showing the structure of a conventionally typical surface discharge AC type PDP.
As shown in FIG. 26A, the PDP has a structure in which a front panel 710 and a back panel 720 are arranged to face each other. The front panel 710 includes a front substrate 711, display electrode pairs 712 that are formed on the surface of the front substrate 711, and a dielectric layer 715 and a dielectric protective layer 716 that are formed to cover the display electrode pairs, in the stated order. Each of the display electrode pairs 712 is composed of a scan electrode 713 and a sustain electrode 714 that extend in a form of stripes. The scan electrode 713 is composed of a transparent electrode element 713a and a bus line 713b that are laminated to each other; and the sustain electrode 714 is composed of a transparent electrode element 714a and a bus line 714b that are laminated to each other. It should be noted here that the bus lines 713b and 714b are provided to reduce the high resistance of the transparent electrode elements 713a and 714a, and are formed to be small in width from a metal material or the like.
The dielectric layer 715 is made of a low-melting point glass, and has a current restriction function that is unique to AC type PDPs. The dielectric protective layer 716 protects the surfaces of the scan electrode 713 and the sustain electrode 714, and has a function to lower the firing voltage by emitting secondary electrons efficiently. As the material of the dielectric protective layer 716, MgO (magnesium oxide), a metal oxide, is widely used since MgO is an optically transparent electrical insulation material that has a high value of the secondary electron emission coefficient γ and has high sputtering resistance.
The back panel 720 is constructed such that a plurality of data electrodes 722 are formed in stripes on a surface of a back substrate 721, and that a dielectric layer 723, which is made of a low-melting point glass, is formed to cover the data electrodes 722 and at least part of a surface of the back substrate 721. Further, on the dielectric layer 723, barrier ribs 724, which are made of a low-melting point glass and have a predetermined height, are formed between adjacent discharge cells (not illustrated), in a form of stripes or parallel crosses (in FIG. 26A, formed in parallel crosses as one example). Also, a phosphor layer 725 is provided inside each dent that is enclosed by the dielectric layer 723 and the barrier ribs 724. One of three colors red, green, and blue, which are the colors of light emitted from the phosphor layers 725, is assigned to each discharge cell.
In manufacturing the PDP, the front panel 710 and the back panel 720 are arranged such that the data electrodes 722 intersect with the scan electrodes 713 and sustain electrodes 714, and the panels are bonded together. In this process, a discharge space 730 is formed between the front panel 710 and the back panel 720. Then, the air remaining therein and impurity gas are exhausted from the space, and a rare gas such as a mixture of xenon (Xe) and neon (Ne) or a mixture of xenon (Xe) and helium (He) is filled in the discharge space 730 as a discharge gas. The rate of partial pressure of Xe to the total pressure of the discharge gas is set to be in a range of 5(%) to 6(%). The filling pressure (total pressure) is set to approximately several tens (kPa). In the PDP, each area where a display electrode pair 712 intersects with a data electrode 722 corresponds to a discharge cell that is a unit of discharge, and a plurality of discharge cells are arranged in a matrix.
A PDP device is composed of the PDP with the above-described structure, a drive circuit, and a control circuit, where the PDP is connected to the drive circuit and the control circuit, and the drive circuit drives the electrodes 713, 714, and 722 in the form of a matrix, and the control circuit controls these components. The AC type PDPs are driven by a drive method that includes the following steps:                (1) the reset period in which all the display cells are reset;        (2) the write period in which each discharge cell is addressed, and display states are selected and input into each cell depending on the input data; and        (3) the sustain period in which discharge cells in the display state are lighted for display.        
The scan electrode 713 and the sustain electrode 714 of the front panel 710 are used for direct lighting for display, and the data electrodes 722 are used for selecting discharge cells that are to be lighted for display, and the data electrodes 722 do not directly contribute to the lighting. In the write period (2) above, the write data is input using the data electrodes 722 of the back panel 720, and the wall charge is formed on the surface of the dielectric protective layer 716 of the front panel 710, facing thereto.
In the sustain period (3) above, voltage pulses (for example, with a rectangular wave voltage of approximately 200 (V)) are respectively applied to the scan electrode 713 and the sustain electrode 714 in each display electrode pair 712 such that these pulses are different from each other in the phase. That is to say, in the sustain period, by applying an AC voltage between the electrodes in each display electrode pair 712, it is possible to cause the discharge cells, in which the display state has been written, to generate a pulse discharge each time the voltage polarity changes. The generation of such sustain discharges causes resonance lines of 147 (nm) to be emitted from the excited Xe atoms and causes molecular beams of 173 (nm) to be emitted from the excited Xe molecules in the discharge spaces 30, as the display light emission.
The ultraviolet rays generated by this are converted into visible light by the phosphor layers 725 of the back panel 720, which enables the visible light to be obtained. Here, in the discharge cells where the wall charge has not been written to the dielectric protective layer 716, the sustain discharge is not generated even if the AC voltage is applied in the sustain period, and the display state therein becomes black. It should be noted here that in the AC type PDPs, generally, a pixel being a unit of display is composed of three discharge cells having respectively phosphor layers 725 of red, green, and blue, as units of display discharges.
In conventional technologies, to improve the contrast ratio, a weak discharge (reset discharge) is generated in a stable manner during the reset period in which the wall charge distribution of all the display cells is reset, among the three operation periods in the PDPs. Typically, a high voltage with a ramp waveform, which represents voltage/time and rises and falls with a slow slant, is applied between the scan electrode 721 and the data electrode 722 of the back panel 720 so as to cause a small discharge current to flow constantly so that a weak discharge is generated in a stable manner.
The discharge generated when the rising ramp waveform voltage is applied during the reset period is a discharge generated when the data electrode 722 or the phosphor layers 725 side having a small value of the secondary electron emission coefficient γ becomes a cathode. For this reason, the firing voltage for the discharge increases. This causes the weak discharge unstable, and makes a strong discharge apt to be generated. This causes a problem that an erroneous light emission (hereinafter referred to as reset luminous point) occurs during the reset period, irrelevant to displaying of image.
In conventional technologies, to generate the weak discharge in a stable manner during the reset period, the surfaces of the phosphor layers 725 are improved in quality. It is considered that by improving the quality of the surfaces of the phosphor layers 725, the firing voltage for when the phosphor layers 725 side becomes a cathode in the reset period is lowered, and this causes the weak discharge to be generated in a stable manner, providing a write control that is accurate enough to restrict the occurrence of the reset luminous points.
Meanwhile, it has been proposed in the development of PDP that the rate of partial pressure of Xe to the total pressure of the discharge gas be increased (for high Xe) to improve the luminous efficiency and luminance. However, if the rate of partial pressure of Xe to the total pressure of the discharge gas is increased, the luminous efficiency is improved, but the firing voltage increases, and when the ramp waveform is applied during the reset period, the weak discharge is generated in an unstable manner, and an accurate reset becomes impossible. This is a critical problem. That is to say, in high-Xe PDPs, the voltage applied at the start of the discharge becomes large, and the discharge delay becomes large. When these happen, the reset discharge generated is apt to be a strong discharge instead of a weak discharge, an inaccurate amount of wall charge moves, reset luminous points occur, and a black display portion of the PDP is lighted to be a white display, and the display becomes inaccurate.
In a proposed conventional technology, all areas of the phosphor layers 725, barrier ribs 724, and back panel 20 that face toward the discharge spaces 730 are covered with a layer of a material that has a high value of the secondary electron emission coefficient γ to decrease the drive voltage, reduce the loss of charged particles on the side surfaces of the barrier ribs 724 or the surface of the phosphor layers 725, and increase the luminous efficiency (see, for example, Document 1).
FIG. 26B is a cross sectional view showing one embodiment disclosed in Document 1. As shown in FIG. 26B, in a back panel 740, all areas of the phosphor layers 725, which have been formed above an inner surface of a back substrate (facing toward the discharge spaces 730), are covered with a phosphor-coating film 746 that is made of a material that has a high value of the secondary electron emission coefficient γ. It should be noted here that in this embodiment, the phosphor-coating film 746 also covers the surface of the barrier ribs 724 so that any area of the surface of the barrier ribs 724 is not exposed to the discharge spaces 730.
In the PDP of Document 1 shown in FIG. 26B, positive wall charges are accumulated on the surface of the phosphor layers 725 in areas near the data electrodes 722, positive ion groups float in the discharge spaces 730 in areas near the data electrodes 722, electric particles having been dispersed in the discharge spaces 730 are lost on the side surfaces of the barrier ribs 724 and the surface of the phosphor layers 725. This adversely influences the luminous efficiency. As a method of solving the problem, Document 1 teaches that a film 746, which is made of a material that has a high value of the secondary electron emission coefficient γ, is formed on areas (surfaces of the phosphor layers 725) in the back panel 740 that face toward the discharge spaces 730, so as to neutralize the floating positive ion groups with the secondary electrons that are released into the discharge spaces 730 when the positive ions bombard the surface of the film 746, thus enhancing the electric field of the discharge spaces 730 such that the next discharge can be generated with low voltage and low power consumption.
It is accordingly considered that the technology of Document 1 can reduce the power of the discharge during the sustain period to a certain extent.
In another conventional technology, a film made of MgO is formed to cover the surface of the phosphor layers 725 to keep the luminance of the PDP for a long time in a stable manner (see, for example, Document 2). This technology adopts a structure in which the surface of the phosphor layers 725 is covered with a film of MgO, which enhances the secondary electron emittance performance and activates the discharge state, and protects the phosphor layers 725 from the sputtering during the discharge. It is accordingly considered that in the PDPs adopting the technology, the luminance can be maintained for a long time in a stable manner.
Document 1: Japanese Patent Application Publication No. 2002-110046
Document 2: Japanese Patent Application Publication No. 08-212929